Wafer-level testing (i.e., on-wafer testing) is a critical part of high-volume production for most semiconductor devices. For electronic devices, wafer-level testing is relatively straightforward. A probe card containing hundreds to thousands of probe pins is placed into contact with the devices on the wafer. The probe pins make electrical contact with electrical pads located on the devices so that electrical signals can be transmitted between the probe card and the devices. Electrical signals received from the devices are used to determine whether the devices are operating as expected or are defective.
Doing on-wafer testing of optoelectronic devices is also critical to providing low cost, high performance products in many growing application areas, such as optical telecommunications, lighting, displays, and more. For optoelectronic devices, however, wafer-level testing is more complicated. In addition to requiring electrical connectivity to the devices on the wafer, optical communication to or from the devices is also required. For optical sources, such as light emitting diodes (LEDs), vertical-cavity surface-emitting lasers (VCSELs), and the like, this can be very difficult as such devices typically emit light over a rather large range of angles. Sufficient light must be captured to enable characterization of the light sources with a high degree of certainty. Specifically, enough light must be captured to enable a sufficiently high signal-to-noise ratio (SNR) that such as characteristics as optical power output (luminosity) and spectral behavior can be determined.
LEDs, in particular, have become increasingly desirable light sources for illumination applications, such as task lighting, general illumination, flashlights, automobile headlamps, automobile tail lights, and “architainment” fixtures (i.e., decorative illumination, such as replacements for neon signage, etc.). The cost of LEDs (as compared to other illumination sources, such as incandescent bulbs, compact fluorescent bulbs, etc.), however, has thus far limited the widespread adoption of LEDs in cases.
Much of the cost associated with LEDs arises from the challenges inherent to wafer-level testing to determine its optical output power and spectral characteristics. Currently, wafer-level testing is done by sequentially positioning a lightwave probe comprising a single optical fiber, such as a Cascade LWP Series light wave probe, over each LED on the wafer, energizing that device, coupling the output light from the LED into the fiber, and then characterizing the light at a photodetector and spectrum analyzer. The time required for the analysis of the light is relatively short. The time spent moving the probe head from device to device and settling it to enable a stable measurement can be quite long, however. In a mass production environment, time means expense.
In an effort to reduce the time required for wafer test, approaches for testing several LEDs while the probe head remains at one position are being considered. In some cases, an integrating sphere is used to capture the light from several LEDs on a wafer, wherein the LEDs are individually energized with an electric current. The integrating sphere is optically coupled to a photodetector and/or spectrum analyzer to characterize the output of the device under test (DUT). In some cases, multiple LEDs are characterized by testing a number of LEDs that are near, but not aligned with, the position of the probe head that contains a single optical fiber. The wide emission angle of a typical LED (often having an included angle of up to 120°) enables light from these unaligned LEDs to couple into the optical fiber, although with different coupling efficiencies. Since the coupling efficiency of an unaligned LED is a function of the displacement of that LED from the optical axis of the fiber, it is possible to estimate the luminosity of the unaligned LEDs based on the amount of light coupled into the fiber. Unfortunately, such an approach provides only an approximation of the luminosity for the off-axis LEDs in an array.
More preferably, a probe head can include an array of N optical fibers that are spaced along a line at the same pitch as the LEDs on the wafer to be tested. These optical fibers can be fusion-spliced to that they collectively form a 1×N fiber coupler having one output and N inputs. During wafer probing, therefore, the inputs are positioned so that each input is aligned with a different LED on the wafer. Each LED is then individually energized so that its light can be characterized. With the probe head in a single position, therefore, N LEDs can be tested in rapid sequence. It is preferable that these optical fibers are single-mode optical fibers; however, in many cases, multi-mode optical fibers are used because of their larger acceptance angle.
Unfortunately, conventional approaches to optical wafer-level testing have several disadvantages. First, due to the wide emission pattern of the LEDs, some of the light of each LED is also be coupled into input fibers other than the input fiber aligned with that LED. This complicates the measurement results since the coupling efficiency at the additional input fibers is not well characterized.
Second, in order to mitigate damage to the valuable LEDs and provide space for the wafer probe card used to electrically connect with the LEDs, the probe head is typically located 1-2 millimeters away from the surface of the wafer being tested. As a result, the intersection of the acceptance cone of each optical fiber and the emission pattern of its corresponding LED is small. Only a small fraction of the light emitted by each LED, therefore, is coupled into its corresponding optical fiber. This results in a low signal-to-noise ratio (SNR) for the measurement, which degrades the accuracy and precision of the measured results.
Third, in many cases, the LEDs on an LED wafer are fabricated at a pitch that approaches, or is smaller than, the diameter of a typical optical fiber. As a result, in such cases, the optical fibers need to be thinned to achieve a matching fiber pitch, making them expensive and fragile.
As a result, it is highly desirable to improve wafer-level testing of optoelectronic devices.